Study of 2-1 Multiplexer using AND, OR & NOT Gates
Product Code : JA-DEECP-1185
The Study of 2-1 Multiplexer using AND, OR and NOT Gates apparatus (SKU JA-DEECP-1185) connects one of two 1-bit sources to a common output. When the select line S is 0 the output follows data input I0, and when S is 1 it follows I1. The circuit realises the expression Y = (NOT S)I0 + S.I1 with AND, OR and NOT gates, so students can check the gate-level design against its truth table.
Specifications
The listing gives these details:
| Product | Study of 2-1 Multiplexer using AND, OR & NOT Gates |
| SKU | JA-DEECP-1185 |
| Function | 2-to-1 line multiplexer |
| Gates | AND, OR and NOT |
| Selection | S = 0: output = I0; S = 1: output = I1 |
| Expression | Y = (NOT S)I0 + S.I1 |
| Supply and indicators | Confirmed on the quotation |
Scope of supply and ordering
Supply and indicator details, quantities and packing are confirmed on the quotation.
Frequently asked questions
How does the select line work on the 2-to-1 multiplexer?
S = 0 passes input I0 to the output and S = 1 passes input I1.
Which gates are used?
AND, OR and NOT gates, following Y = (NOT S)I0 + S.I1.
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More combinational logic apparatus is in our scientific instrument range.
Request a quote
Send your quantity for the 2-to-1 multiplexer apparatus through the contact page. Tender and project enquiries can be sent through the tenders page.
